This invention relates to programmable logic devices. More particularly, this invention relates to redundant circuitry for programmable logic devices.
Programmable logic devices are integrated circuits that may be programmed by a user to perform various logic functions. Like all integrated circuits, programmable logic devices are susceptible to manufacturing defects. If the rate of defects in a production run is high, the yield of good parts will be low, thereby increasing the manufacturing cost of each good part. In order to increase yields, programmable logic devices may be provided with spare or redundant circuits. When a manufacturing defect is detected in a circuit on the programmable logic device, that defective circuit may be repaired by switching the redundant circuit into use in its place. Programmable logic devices that are repaired in this way operate identically to devices that were manufactured completely without defects. The user therefore need not be concerned with whether a device has been repaired or was manufactured without a defect.
Care must be taken, however, that the overhead in circuit resources that is required to implement a redundancy scheme on a programmable logic device does not unduly increase the cost of manufacturing the programmable logic device. If too many resources are used to implement redundancy, the benefits of redundancy may be lost.
In addition, it is important that the patterns of interconnection conductors used to route signals on the programmable logic device are arranged so that they can accommodate redundancy.
The programmable logic on a programmable logic device may be organized by grouping logic in regions of various sizes. For example, programmable logic devices may contain relatively small areas of logic referred to as logic elements. These logic elements may be grouped to form programmable logic regions. The programmable logic regions and associated programmable memory regions may be grouped to form programmable logic super-regions. Appropriate switching resources and interconnections must be provided to implement redundancy in programmable logic devices that contain programmable logic that is organized in this way.
It is therefore an object of the present invention to provide a redundancy scheme in which the circuitry used to switch redundant circuitry into use and the interconnection patterns used to implement redundancy may be simplified and improved.